1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, and a clock oscillation technology that is effective when applied to a slave device exemplified by a USB (Universal Serial Bus) client for performing Plesiochronous communications with a main device through connection therewith.
2. Description of the Related Art
In recent years, USB has become increasingly popular for establishing connections between personal computers (PCs) and their peripheral devices, and accordingly various peripheral devices in the market are becoming USB-compliant.
In Patent Document 1 (JP-A-2001-230837), for example, there is a description about Isochronous communications in a telephone system using USB. To be specific, two counters are used to suppress noise occurrence to be caused by audio data slipping resulted from clock difference between a PC and the telephone system. One counter is used to count frame signals called SOFs coming from the PC in a cycle of about a millisecond (ms) in an asynchronous transfer mode. The other counter is provided to count frames synchronous with clocks of a switched telephone network. As to their resulting counter values, a difference therebetween is taken to use it as a basis for clock selection for the telephone system.
In Patent Document 2 (JP-A-2002-141911), disclosed is the technology dealing with two modes for clock switching, i.e., full speed mode (12 MHz) defined by the USB 1.1 specification, and a high speed mode (480 MHz) newly defined by the USB 2.0. Such clock switching is done depending on which mode, and aimed to reduce the power consumption of PLLs those generating sampling clocks.